1. Field of the Invention
This invention relates generally to dithering techniques, and more particularly to a method of dithering for sigma-delta analog-to-digital converters.
2. Description of the Prior Art
Idle channel tones are known to exist in sigma-delta converters. A second-order sigma-delta modulator 100 architecture is shown in FIG. 1. The converter includes two integrators 102, 104 and two negative feedback loops 106, 108, k1 and k2 are forwarding coefficients; kf1 and kf2 are feedback coefficients. When input x(n) is a small DC signal or some small DC offset: if the channel is idle, the output y(n) of the sigma-delta modulator would be a series of digital codes that has a low frequency pattern. The frequency is proportional to the input DC offset and the sampling clock frequency. In audio applications, the tones could lead to unpleasant sound when there is only DC offset and/or a very low frequency (several Hz) signal with a very small amplitude.
Many dithering methods have been proposed for reducing idle channel tones: Some of these include (1) adding an out-of-band sine or square wave; (2) adding a DC offset to the input of the modulator; (3) adding a small amount of white noise to the input x; (4) adding a small-amplitude periodic pulse train; and (5) starting the integrators with irrational values. The above techniques are generally either too complicated to implement or not desirably effective.
In view of the foregoing, it would be highly desirable and advantageous to provide a dithering technique that is more effective than known static dithering techniques to remove idle channel tones associated with sigma-delta analog-to-digital converters.